libpfm_intel_snb_unc(3) [centos man page]
LIBPFM(3) Linux Programmer's Manual LIBPFM(3) NAME
libpfm_intel_snb_unc - support for Intel Sandy Bridge uncore PMU SYNOPSIS
#include <perfmon/pfmlib.h> PMU name: snb_unc_cbo0, snb_unc_cbo1, snb_unc_cbo2, snb_unc_cbo3 PMU desc: Intel Sandy Bridge C-box uncore DESCRIPTION
The library supports the Intel Sandy Bridge client part (model 42) uncore PMU. The support is currently limited to the Coherency Box, so called C-Box for up to 4 physical cores. Each physical core has an associated C-Box which it uses to communictate with the L3 cache. The C-boxes all support the same set of events. However, Core 0 C-box (snb_unc_cbo0) supports an additional uncore clock ticks event: UNC_CLOCKTICKS. MODIFIERS
The following modifiers are supported on Intel Sandy Bridge C-Box uncore PMU: i Invert the meaning of the event. The counter will now count cycles in which the event is not occurring. This is a boolean modifier e Enable edge detection, i.e., count only when there is a state transition from no occurrence of the event to at least one occurrence. This modifier must be combined with a counter mask modifier (m) with a value greater or equal to one. This is a boolean modifier. c Set the counter mask value. The mask acts as a threshold. The counter will count the number of cycles in which the number of occur- rences of the event is greater or equal to the threshold. This is an integer modifier with values in the range [0:255]. Both the UNC_CBO_CACHE_LOOKUP and UNC_CBO_XSNP_RESPONSE requires two umasks to be valid. For UNC_CBO_CACHE_LOOKUP the first umask must be one of the MESI state umasks, the second has to be one of the filters. For UNC_CBO_XSNP_RESPONSE the first umask must be one of the snoop types, the second has to be one of the filters. AUTHORS
Stephane Eranian <eranian@gmail.com> August, 2012 LIBPFM(3)
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LIBPFM(3) Linux Programmer's Manual LIBPFM(3) NAME
libpfm_intel_ivb_unc - support for Intel Ivy Bridge uncore PMU SYNOPSIS
#include <perfmon/pfmlib.h> PMU name: ivb_unc_cbo0, ivb_unc_cbo1, ivb_unc_cbo2, ivb_unc_cbo3 PMU desc: Intel Ivy Bridge C-box uncore DESCRIPTION
The library supports the Intel Ivy Bridge client part (model 58) uncore PMU. The support is currently limited to the Coherency Box, so called C-Box for up to 4 physical cores. Each physical core has an associated C-Box which it uses to communictate with the L3 cache. The C-boxes all support the same set of events. However, Core 0 C-box (snb_unc_cbo0) supports an additional uncore clock ticks event: UNC_CLOCKTICKS. MODIFIERS
The following modifiers are supported on Intel Ivy Bridge C-Box uncore PMU: i Invert the meaning of the event. The counter will now count cycles in which the event is not occurring. This is a boolean modifier e Enable edge detection, i.e., count only when there is a state transition from no occurrence of the event to at least one occurrence. This modifier must be combined with a counter mask modifier (m) with a value greater or equal to one. This is a boolean modifier. c Set the counter mask value. The mask acts as a threshold. The counter will count the number of cycles in which the number of occur- rences of the event is greater or equal to the threshold. This is an integer modifier with values in the range [0:255]. Both the UNC_CBO_CACHE_LOOKUP and UNC_CBO_XSNP_RESPONSE requires two umasks to be valid. For UNC_CBO_CACHE_LOOKUP the first umask must be one of the MESI state umasks, the second has to be one of the filters. For UNC_CBO_XSNP_RESPONSE the first umask must be one of the snoop types, the second has to be one of the filters. AUTHORS
Stephane Eranian <eranian@gmail.com> June, 2013 LIBPFM(3)