MPT_FREE_FW_MEMORY(9) Message-based devices MPT_FREE_FW_MEMORY(9)NAME
mpt_free_fw_memory - free firmware memory
SYNOPSIS
void mpt_free_fw_memory(MPT_ADAPTER * ioc);
ARGUMENTS
ioc
Pointer to MPT_ADAPTER structure
DESCRIPTION
If alt_img is NULL, delete from ioc structure. Else, delete a secondary image in same format.
COPYRIGHT Kernel Hackers Manual 3.10 June 2014 MPT_FREE_FW_MEMORY(9)
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OCP(1) CAO-VLSI Reference Manual OCP(1)NAME
ocp
- Standard Cell Placer
ORIGIN
This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM team at LIP6 laboratory of Universite Pierre et Marie CURIE, in
Paris, France.
Web : http://asim.lip6.fr/recherche/alliance/
E-mail : alliance-users@asim.lip6.fr
SYNOPSIS
ocp [options] netlist outputname
DESCRIPTION
ocp is an automatic place tool for standard-cells.
input net-list
The netlist file describes the input net-list.
ocp supports a hierarchical net-list. In this case the net-list is flattened by the placer according to the catalog file. The net-list for-
mat can be : structural VHDL, EDIF, or ALLIANCE internal format according to the environment variable MBK_IN_LO.
output layout
The file containing the placed block will have the name outputname. This name is not optionnal and must always be present. The output for-
mat is defined by the environment variable MBK_OUT_PH.
OPTIONS
Optional cells placement file
-partial <NAME>
A user defined pre-placement can be specified, thanks to a placement file.
The optional placement file must be given by the user. It must have an extension that denotes the format defined by the environment vari-
able MBK_IN_PH.
Optional connectors placement
The placement of connectors can be also specified.
There are four ways to place connectors in a physical view :
-partial <NAME> pre-placed connectors defined by the user can be provided through the pre-placement file. In that case, automatic connector
placement is impossible.
-c option will automatically place the connectors randomly. The auto placement will set connectors on each side of the abutment box.
-ring option will automatically place the connectors for the ring pad placement tool. The placement is random but only on the north and
south side unless the -ioc <NAME> option is given, in which case the constraints given in the <NAME>.ioc file will be respected, but with
layers suitable for ring.
-ioc <NAME> option will place connectors as specified by the <NAME>.ioc given file.
Margin
It is possible to force the free area of the physical view.
The -margin <MARGIN> option allow to set The amount of free area added in percentage of the cells area.
The resulting area will be equal to CELL_AREA * (1 + <MARGIN>).
By default, the margin value is 0.2 (20%)
-eqmargin option will distribute equitably the margin between cells. By default, the biggest possible number of 2-pitch tie cells is
inserted. This is done to have the best well and bulk polarity.
Number of rows
-rows <NR> option forces the design to be placed in <NR> rows.
The abutment box's width is automatically generated.
This option won't be used if a defined placement file is given.
Verbose mode
-v set the verbose mode on
Gnuplot
-gnuplot option allow to generate automatically gnuplot files, for editing statistics
IOC format
The IOC format is based on Cadence input-output connectors placement description.
The description is composed of 5 possibles sections: TOP(), BOTTOM(), LEFT(), RIGHT(), and IGNORE()
In each section except IGNORE(), there are placed IOs.
In the IGNORE() section, the IOs are ignored by OCP.
In every section, the IO syntax could be:
for pin: (IOPIN iopinName.0 );
for space: SPACE value;
The capital words are keywords. orientation is not required.
The value is the space (number of pitches) between the IO above and the IO below it.
Example
TOP ( # IOs are ordered from left to right
(IOPIN b(3).0 );
(IOPIN cin.0 );
(IOPIN ck.0 );
(IOPIN cout.0 );
)
BOTTOM ( # IOs are ordered from left to right
(IOPIN i(3).0 );
(IOPIN i(4).0 );
(IOPIN i(5).0 );
(IOPIN i(6).0 );
)
IGNORE ( # IOs are ignored(not placed) by IO Placer
)
ENVIRONMENT VARIABLES
ocp uses the environment variables MBK_VDD and MBK_VSS to know the name of the power signals vdd and vss.
SEE ALSO nero(1), MBK_IN_LO(1), MBK_IN_PH(1), MBK_OUT_PH(1), MBK_VDD(1), MBK_VSS(1)BUG REPORT
This tool is under development at the ASIM department of the LIP6 laboratory.
We need your feedback to improve documentation and tools.
ASIM /LIP6 September 27, 2001 OCP(1)