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get_cyclecount(9) [debian man page]

GET_CYCLECOUNT(9)					   BSD Kernel Developer's Manual					 GET_CYCLECOUNT(9)

NAME
get_cyclecount -- get the CPU's fast counter register contents SYNOPSIS
#include <sys/param.h> #include <sys/systm.h> #include <machine/cpu.h> u_int64_t get_cyclecount(void); DESCRIPTION
The get_cyclecount() function uses a register available in most modern CPUs to return a value that is monotonically increasing inside each CPU. On SMP systems, there will be a number of separate monotonic sequences, one for each CPU running. The value in the SMP case is selected from one of these sequences, dependent on which CPU was scheduled to service the request. The speed and the maximum value of each counter is CPU-dependent. Some CPUs (such as the Intel 80486) do not have such a register, so get_cyclecount() on these platforms returns the number of nanoseconds represented by the structure returned by nanotime(9). The Pentium processors all use the TSC register. The Alpha processors use the PCC register. The IA64 processors use the AR.ITC register. SEE ALSO
nanotime(9) HISTORY
The get_cyclecount() function first appeared in FreeBSD 5.0. AUTHORS
This manual page was written by Mark Murray <markm@FreeBSD.org>. BSD
November 20, 2000 BSD

Check Out this Related Man Page

SMP(4)							   BSD Kernel Interfaces Manual 						    SMP(4)

NAME
SMP -- description of the FreeBSD Symmetric Multi-Processor kernel SYNOPSIS
options SMP DESCRIPTION
The SMP kernel implements symmetric multi-processor support. COMPATIBILITY
Support for multi-processor systems is present for all Tier-1 architectures on FreeBSD. Currently, this includes amd64, i386 and sparc64. Support is enabled using options SMP. It is permissible to use the SMP kernel configuration on non-SMP equipped motherboards. I386 NOTES For i386 systems, the SMP kernel supports motherboards that follow the Intel MP specification, version 1.4. In addition to options SMP, i386 also requires device apic. The mptable(1) command may be used to view the status of multi-processor support. The number of CPUs detected by the system is available in the read-only sysctl variable hw.ncpu. FreeBSD allows specific CPUs on a multi-processor system to be disabled. This can be done using the hint.lapic.X.disabled tunable, where X is the APIC ID of a CPU. Setting this tunable to 1 will result in the corresponding CPU being disabled. The sched_ule(4) scheduler implements CPU topology detection and adjusts the scheduling algorithms to make better use of modern multi-core CPUs. The sysctl variable kern.sched.topology_spec reflects the detected CPU hardware in a parsable XML format. The top level XML tag is <groups>, which encloses one or more <group> tags containing data about individual CPU groups. A CPU group contains CPUs that are detected to be "close" together, usually by being cores in a single multi-core processor. Attributes available in a <group> tag are "level", corre- sponding to the nesting level of the CPU group and "cache-level", corresponding to the level of CPU caches shared by the CPUs in the group. The <group> tag contains the <cpu> and <flags> tags. The <cpu> tag describes CPUs in the group. Its attributes are "count", corresponding to the number of CPUs in the group and "mask", corresponding to the integer binary mask in which each bit position set to 1 signifies a CPU belonging to the group. The contents (CDATA) of the <cpu> tag is the comma-delimited list of CPU indexes (derived from the "mask" attribute). The <flags> tag contains special tags (if any) describing the relation of the CPUs in the group. The possible flags are cur- rently "HTT" and "SMT", corresponding to the various implementations of hardware multithreading. An example topology_spec output for a sys- tem consisting of two quad-core processors is: <groups> <group level="1" cache-level="0"> <cpu count="8" mask="0xff">0, 1, 2, 3, 4, 5, 6, 7</cpu> <flags></flags> <children> <group level="2" cache-level="0"> <cpu count="4" mask="0xf">0, 1, 2, 3</cpu> <flags></flags> </group> <group level="2" cache-level="0"> <cpu count="4" mask="0xf0">4, 5, 6, 7</cpu> <flags></flags> </group> </children> </group> </groups> This information is used internally by the kernel to schedule related tasks on CPUs that are closely grouped together. FreeBSD supports hyperthreading on Intel CPU's on the i386 and AMD64 platforms. Because using logical CPUs can cause performance penalties under certain loads, the logical CPUs can be disabled by setting the machdep.hyperthreading_allowed tunable to zero. SEE ALSO
cpuset(1), mptable(1), sched_4bsd(4), sched_ule(4), loader(8), sysctl(8), condvar(9), msleep(9), mtx_pool(9), mutex(9), rwlock(9), sema(9), sx(9) HISTORY
The SMP kernel's early history is not (properly) recorded. It was developed in a separate CVS branch until April 26, 1997, at which point it was merged into 3.0-current. By this date 3.0-current had already been merged with Lite2 kernel code. FreeBSD 5.0 introduced support for a host of new synchronization primitives, and a move towards fine-grained kernel locking rather than reliance on a Giant kernel lock. The SMPng Project relied heavily on the support of BSDi, who provided reference source code from the fine- grained SMP implementation found in BSD/OS. FreeBSD 5.0 also introduced support for SMP on the sparc64 architecture. AUTHORS
Steve Passe <fsmp@FreeBSD.org> BSD
May 7, 2008 BSD
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